x64 crefine: proof updates for new arch split functions
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
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@ -13,8 +13,8 @@ context kernel_m begin
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lemma invokeIRQHandler_AckIRQ_ccorres:
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"ccorres dc xfdc
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invs' (UNIV \<inter> {s. irq_' s = ucast irq}) []
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(invokeIRQHandler (AckIRQ irq)) (Call invokeIRQHandler_AckIRQ_'proc)"
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apply (cinit lift: irq_')
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(InterruptDecls_H.invokeIRQHandler (AckIRQ irq)) (Call invokeIRQHandler_AckIRQ_'proc)"
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apply (cinit lift: irq_' simp: Interrupt_H.invokeIRQHandler_def invokeIRQHandler_def)
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apply (ctac add: maskInterrupt_ccorres)
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apply (simp add: from_bool_def false_def)
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done
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@ -60,13 +60,13 @@ lemma invokeIRQHandler_SetIRQHandler_ccorres:
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and irq_handler_inv_valid' (SetIRQHandler irq cp slot))
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(UNIV \<inter> {s. irq_' s = ucast irq} \<inter> {s. slot_' s = Ptr slot}
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\<inter> {s. ccap_relation cp (cap_' s)}) []
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(invokeIRQHandler (SetIRQHandler irq cp slot))
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(InterruptDecls_H.invokeIRQHandler (SetIRQHandler irq cp slot))
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(Call invokeIRQHandler_SetIRQHandler_'proc)"
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proof -
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have valid_objs_invs'_strg: "\<And>s. invs' s \<longrightarrow> valid_objs' s"
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by (clarsimp)
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show ?thesis
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apply (cinit lift: irq_' slot_' cap_')
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apply (cinit lift: irq_' slot_' cap_' simp: Interrupt_H.invokeIRQHandler_def)
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apply (rule ccorres_Guard_intStateIRQNode_array_Ptr)
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apply (rule ccorres_move_array_assertion_irq)
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apply (simp add: ucast_up_ucast is_up of_int_uint_ucast[symmetric])
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@ -103,9 +103,9 @@ lemma invokeIRQHandler_ClearIRQHandler_ccorres:
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"ccorres dc xfdc
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(invs' and (\<lambda>s. weak_sch_act_wf (ksSchedulerAction s) s) and K(irq \<le> 0xFF))
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(UNIV \<inter> {s. irq_' s = ucast irq}) []
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(invokeIRQHandler (ClearIRQHandler irq))
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(InterruptDecls_H.invokeIRQHandler (ClearIRQHandler irq))
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(Call invokeIRQHandler_ClearIRQHandler_'proc)"
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apply (cinit lift: irq_')
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apply (cinit lift: irq_' simp: Interrupt_H.invokeIRQHandler_def)
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apply (rule ccorres_Guard_intStateIRQNode_array_Ptr)
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apply (rule ccorres_move_array_assertion_irq)
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apply (simp add: ucast_up_ucast is_up of_int_uint_ucast[symmetric])
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@ -1686,6 +1686,7 @@ lemma handleInterrupt_ccorres:
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apply csymbr
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apply csymbr
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apply (ctac (no_vcg) add: sendSignal_ccorres)
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apply (simp add: maskIrqSignal_def)
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apply (ctac (no_vcg) add: maskInterrupt_ccorres)
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apply (ctac add: ackInterrupt_ccorres [unfolded dc_def])
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apply wp+
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@ -1694,7 +1695,7 @@ lemma handleInterrupt_ccorres:
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apply (rule ccorres_rhs_assoc)+
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apply csymbr+
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apply (rule ccorres_cond_false_seq)
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apply simp
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apply (simp add: maskIrqSignal_def)
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apply (ctac (no_vcg) add: maskInterrupt_ccorres)
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apply (ctac add: ackInterrupt_ccorres [unfolded dc_def])
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apply wp
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@ -1703,7 +1704,8 @@ lemma handleInterrupt_ccorres:
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apply (case_tac rva, simp_all del: Collect_const)[1]
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prefer 3
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apply metis
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apply ((rule ccorres_guard_imp2,
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apply ((simp add: maskIrqSignal_def,
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rule ccorres_guard_imp2,
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rule ccorres_cond_false_seq, simp,
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rule ccorres_cond_false_seq, simp,
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ctac (no_vcg) add: maskInterrupt_ccorres,
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