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arm-hyp crefine: fixes get_gic_vcpu_ctrl_lr machine op + others 

* others: fix arg name in get_gic_vcpu_ctrl_eisr0
    get_gic_vcpu_ctrl_eisr1 and get_gic_vcpu_ctrl_misr
This commit is contained in:
Alejandro Gomez-Londono 2017-04-28 22:21:59 +10:00 committed by Alejandro Gomez-Londono
parent f24fe6ac7d
commit 396039a730
1 changed files with 4 additions and 4 deletions
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8
proof/crefine/ARM_HYP/Machine_C.thy
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@ -324,13 +324,13 @@ assumes get_gic_vcpu_ctrl_vtr_ccorres:
"ccorres (op =) ret__unsigned_long_' \<top> UNIV []
(doMachineOp get_gic_vcpu_ctrl_vtr) (Call get_gic_vcpu_ctrl_vtr_'proc)"
assumes get_gic_vcpu_ctrl_eisr0_ccorres:
"ccorres (op =) ret__unsigned_long_' \<top> UNIV []
"ccorres (op =) ret__unsigned_' \<top> UNIV []
(doMachineOp get_gic_vcpu_ctrl_eisr0) (Call get_gic_vcpu_ctrl_eisr0_'proc)"
assumes get_gic_vcpu_ctrl_eisr1_ccorres:
"ccorres (op =) ret__unsigned_long_' \<top> UNIV []
"ccorres (op =) ret__unsigned_' \<top> UNIV []
(doMachineOp get_gic_vcpu_ctrl_eisr1) (Call get_gic_vcpu_ctrl_eisr1_'proc)"
assumes get_gic_vcpu_ctrl_misr_ccorres:
"ccorres (op =) ret__unsigned_long_' \<top> UNIV []
"ccorres (op =) ret__unsigned_' \<top> UNIV []
(doMachineOp get_gic_vcpu_ctrl_misr) (Call get_gic_vcpu_ctrl_misr_'proc)"
assumes set_gic_vcpu_ctrl_hcr_ccorres:
@ -348,7 +348,7 @@ assumes set_gic_vcpu_ctrl_lr_ccorres:
(doMachineOp (set_gic_vcpu_ctrl_lr n lr)) (Call set_gic_vcpu_ctrl_lr_'proc)"
assumes get_gic_vcpu_ctrl_lr_ccorres:
"ccorres (op =) ret__unsigned_long_' \<top> (\<lbrace>\<acute>num = scast n \<rbrace>) []
"ccorres (\<lambda>v virq. virq = virq_C (FCP (\<lambda>_. v))) ret__struct_virq_C_' \<top> (\<lbrace>\<acute>num = scast n \<rbrace>) hs
(doMachineOp (get_gic_vcpu_ctrl_lr n)) (Call get_gic_vcpu_ctrl_lr_'proc)"
(* The following are fastpath specific assumptions.