l4v-proof-porting: make c-parser and haskell translator happy
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@ -96,7 +96,8 @@ Library
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hs-source-dirs: src
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ghc-prof-options: -auto-all -fprof-auto
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--ghc-prof-options: -auto-all -fprof-auto
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ghc-prof-options: -auto-all -prof -fprof-auto
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ghc-options: -Wall -Werror -O2 -fno-warn-unused-do-bind
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-fno-warn-missing-signatures -fno-warn-orphans
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-fno-spec-constr -fno-warn-name-shadowing
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@ -298,7 +298,7 @@ Create idle thread and set up current thread + scheduler state.
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> (flip mapM) (take maxNumFreememRegions freemem)
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> (\reg -> do
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> (\f -> foldM f reg [4 .. (finiteBitSize (undefined::Word)) - 2])
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> (\f -> foldME f reg [4 .. (finiteBitSize (undefined::Word)) - 2])
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> (\reg bits -> do
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> reg' <- (if not (isAligned (regStartPAddr reg) (bits + 1))
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> && (regEndPAddr reg) - (regStartPAddr reg) >= bit bits
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@ -398,4 +398,7 @@ Various functions in this module use "rangesBy" to split a sorted list into cont
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> distinct [] = True
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> distinct (x:xs) = (notElem x xs && distinct xs)
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Following foldME is for l4v haskell translator
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> foldME = foldM
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@ -32,14 +32,14 @@ This module defines the low-level ARM hardware interface.
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The ARM-specific register set definitions are qualified with the "ARM" prefix, and the platform-specific hardware access functions are qualified with the "Platform" prefix. The latter module is outside the scope of the reference manual; for the executable model, it is specific to the external simulator used for user-level code.
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> import qualified SEL4.Machine.RegisterSet.ARM as ARM
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> import qualified SEL4.Machine.Hardware.ARM.Callbacks as Common
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> import qualified SEL4.Machine.Hardware.ARM.Callbacks as Platform
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> import qualified SEL4.Machine.Hardware.ARM.PLATFORM as Platform
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\subsection{Data Types}
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The machine monad contains a platform-specific opaque pointer, used by the external simulator interface.
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> type MachineData = Common.MachineData
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> type MachineData = Platform.MachineData
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> type MachineMonad = ReaderT MachineData IO
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@ -48,7 +48,7 @@ The machine monad contains a platform-specific opaque pointer, used by the exter
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> newtype HardwareASID = HardwareASID { fromHWASID :: Word8 }
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> deriving (Num, Enum, Bounded, Ord, Ix, Eq, Show)
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> toPAddr = Common.PAddr
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> toPAddr = Platform.PAddr
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\subsubsection{Virtual Memory}
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@ -72,7 +72,7 @@ ARM virtual memory faults are handled by one of two trap handlers: one for data
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The ARM MMU does not allow access to physical addresses while translation is enabled; the kernel must access its objects via virtual addresses. Depending on the platform, these virtual addresses may either be the same as the physical addresses, or offset by a constant.
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> type PAddr = Common.PAddr
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> type PAddr = Platform.PAddr
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> ptrFromPAddr :: PAddr -> PPtr a
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> ptrFromPAddr = Platform.ptrFromPAddr
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@ -81,7 +81,7 @@ The ARM MMU does not allow access to physical addresses while translation is ena
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> addrFromPPtr = Platform.addrFromPPtr
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> fromPAddr :: PAddr -> Word
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> fromPAddr = Common.fromPAddr
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> fromPAddr = Platform.fromPAddr
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\subsection{Hardware Access}
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@ -114,12 +114,12 @@ The following functions define the ARM-specific interface between the kernel and
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> loadWord :: PPtr Word -> MachineMonad Word
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> loadWord ptr = do
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> cbptr <- ask
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> liftIO $ Common.loadWordCallback cbptr $ addrFromPPtr ptr
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> liftIO $ Platform.loadWordCallback cbptr $ addrFromPPtr ptr
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> storeWord :: PPtr Word -> Word -> MachineMonad ()
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> storeWord ptr val = do
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> cbptr <- ask
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> liftIO $ Common.storeWordCallback cbptr (addrFromPPtr ptr) val
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> liftIO $ Platform.storeWordCallback cbptr (addrFromPPtr ptr) val
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> storeWordVM :: PPtr Word -> Word -> MachineMonad ()
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> storeWordVM ptr val = storeWord ptr val
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@ -217,7 +217,7 @@ caches must be done separately.
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> writeTTBR0 :: PAddr -> MachineMonad ()
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> writeTTBR0 pd = do
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> cbptr <- ask
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> liftIO $ Common.writeTTBR0 cbptr pd
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> liftIO $ Platform.writeTTBR0 cbptr pd
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> setCurrentPD :: PAddr -> MachineMonad ()
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> setCurrentPD pd = do
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@ -228,7 +228,7 @@ caches must be done separately.
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> setHardwareASID :: HardwareASID -> MachineMonad ()
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> setHardwareASID (HardwareASID hw_asid) = do
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> cbptr <- ask
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> liftIO $ Common.setHardwareASID cbptr hw_asid
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> liftIO $ Platform.setHardwareASID cbptr hw_asid
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\subsubsection{Memory Barriers}
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@ -252,17 +252,17 @@ caches must be done separately.
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> invalidateTLB :: MachineMonad ()
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> invalidateTLB = do
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> cbptr <- ask
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> liftIO $ Common.invalidateTLBCallback cbptr
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> liftIO $ Platform.invalidateTLBCallback cbptr
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> invalidateTLB_ASID :: HardwareASID -> MachineMonad ()
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> invalidateTLB_ASID (HardwareASID hw_asid) = do
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> cbptr <- ask
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> liftIO $ Common.invalidateTLB_ASIDCallback cbptr hw_asid
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> liftIO $ Platform.invalidateTLB_ASIDCallback cbptr hw_asid
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> invalidateTLB_VAASID :: Word -> MachineMonad ()
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> invalidateTLB_VAASID mva_plus_asid = do
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> cbptr <- ask
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> liftIO $ Common.invalidateTLB_VAASIDCallback cbptr mva_plus_asid
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> liftIO $ Platform.invalidateTLB_VAASIDCallback cbptr mva_plus_asid
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> cleanByVA :: VPtr -> PAddr -> MachineMonad ()
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> cleanByVA mva pa = do
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@ -411,17 +411,17 @@ implementation assumes the monitor is not modelled in our simulator.
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> getIFSR :: MachineMonad Word
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> getIFSR = do
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> cbptr <- ask
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> liftIO $ Common.getIFSR cbptr
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> liftIO $ Platform.getIFSR cbptr
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> getDFSR :: MachineMonad Word
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> getDFSR = do
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> cbptr <- ask
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> liftIO $ Common.getDFSR cbptr
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> liftIO $ Platform.getDFSR cbptr
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> getFAR :: MachineMonad VPtr
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> getFAR = do
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> cbptr <- ask
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> liftIO $ Common.getFAR cbptr
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> liftIO $ Platform.getFAR cbptr
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\subsubsection{Page Table Structure}
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@ -222,9 +222,10 @@ Update the state with the new "PSpace" map.
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\subsubsection{Deleting Objects}
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> deleteRange :: Data.Map.Map Word a -> Word -> Word -> Data.Map.Map Word a
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> deleteRange m pstart pend =
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> deleteRange :: Data.Map.Map Word a -> Word -> Int -> Data.Map.Map Word a
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> deleteRange m pstart bits =
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> let (_,lr) = Data.Map.split (pstart-1) m
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> pend = pstart + 2^bits
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> (mid,_) = Data.Map.split pend lr in
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> foldl' (flip Data.Map.delete) m (Data.Map.keys mid)
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@ -239,7 +240,7 @@ No type checks are performed when deleting objects; "deleteObjects" simply delet
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> doMachineOp $ freeMemory (PPtr (fromPPtr ptr)) bits
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> ps <- gets ksPSpace
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> let inRange = (\x -> x .&. ((- mask bits) - 1) == fromPPtr ptr)
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> let map' = deleteRange (psMap ps) (fromPPtr ptr) (fromPPtr ptr + 2^bits)
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> let map' = deleteRange (psMap ps) (fromPPtr ptr) bits
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> let ps' = ps { psMap = map' }
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> modify (\ks -> ks { ksPSpace = ps'})
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