x64: progress in CSpace1_R.thy
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@ -146,7 +146,7 @@ lemma obj_size_relation:
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apply (rename_tac arch_cap)
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apply (case_tac arch_cap,
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simp_all add: objBits_def X64_H.capUntypedSize_def asid_low_bits_def
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pageBits_def)
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bit_simps)
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done
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lemma same_region_as_relation:
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@ -291,13 +291,13 @@ lemma cap_relation_masks:
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"cap_relation c c' \<Longrightarrow> cap_relation
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(cap_rights_update (cap_rights c \<inter> rmask) c)
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(RetypeDecls_H.maskCapRights (rights_mask_map rmask) c')"
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apply (case_tac c, simp_all add: isCap_defs maskCapRights_def Let_def
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apply (case_tac c, simp_all add: isCap_defs maskCapRights_def Let_def
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rights_mask_map_def maskVMRights_def
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AllowSend_def AllowRecv_def
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cap_rights_update_def
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split del: if_split)
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apply (clarsimp simp add: isCap_defs)
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by (rule ArchAcc_R.arch_cap_rights_update
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apply (clarsimp simp add: isCap_defs)
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by (rule ArchAcc_R.arch_cap_rights_update
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[simplified, simplified rights_mask_map_def])
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lemma getCTE_wp:
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@ -422,15 +422,15 @@ lemma cap_map_update_data:
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shows "cap_relation (update_cap_data p x c) (updateCapData p x c')"
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proof -
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note simps = update_cap_data_def updateCapData_def word_size
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isCap_defs is_cap_defs Let_def
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isCap_defs is_cap_defs Let_def badge_bits_def
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cap_rights_update_def badge_update_def
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{ fix x :: word32
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def y \<equiv> "(x >> 8) && mask 18"
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def z \<equiv> "unat ((x >> 3) && mask 5)"
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have "of_bl (to_bl (y && mask z)) = (of_bl (replicate (32-z) False @ drop (32-z) (to_bl y))::word32)"
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{ fix x :: machine_word
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def y \<equiv> "(x >> 8) && mask 18" (* guard_bits *)
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def z \<equiv> "unat ((x >> 2) && mask 6)" (* cnode_padding_bits, cnode_guard_size_bits *)
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have "of_bl (to_bl (y && mask z)) = (of_bl (replicate (64-z) False @ drop (64-z) (to_bl y))::machine_word)"
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by (simp add: bl_and_mask)
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then
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have "y && mask z = of_bl (drop (32 - z) (to_bl y))"
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have "y && mask z = of_bl (drop (64 - z) (to_bl y))"
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apply simp
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apply (subst test_bit_eq_iff [symmetric])
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apply (rule ext)
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@ -421,7 +421,7 @@ where valid_cap'_def:
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| Structures_H.CNodeCap r bits guard guard_sz \<Rightarrow>
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bits \<noteq> 0 \<and> bits + guard_sz \<le> word_bits \<and>
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guard && mask guard_sz = guard \<and>
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(\<forall>addr. real_cte_at' (r + 16 * (addr && mask bits)) s)
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(\<forall>addr. real_cte_at' (r + 32 * (addr && mask bits)) s)
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| Structures_H.ThreadCap r \<Rightarrow> tcb_at' r s
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| Structures_H.ReplyCap r m \<Rightarrow> tcb_at' r s
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| Structures_H.IRQControlCap \<Rightarrow> True
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@ -22,7 +22,7 @@ context begin interpretation Arch . (*FIXME: arch_split*)
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definition
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cte_map :: "cslot_ptr \<Rightarrow> machine_word"
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where
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"cte_map \<equiv> \<lambda>(oref, cref). oref + (of_bl cref * 16)"
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"cte_map \<equiv> \<lambda>(oref, cref). oref + (of_bl cref * 32)"
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definition
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lookup_failure_map :: "ExceptionTypes_A.lookup_failure \<Rightarrow> Fault_H.lookup_failure"
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