riscv aspec: sync with C fix for SELFOUR-1955
aspec now in sync with seL4 master@a39c9b6a76d279364e28d3415d750d7287fefd67
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@ -71,26 +71,15 @@ fun handle_vm_fault :: "obj_ref \<Rightarrow> vmfault_type \<Rightarrow> (unit,'
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let
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loadf = (\<lambda>a. throwError $ ArchFault $ VMFault a [0, vmFaultTypeFSR RISCVLoadAccessFault]);
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storef = (\<lambda>a. throwError $ ArchFault $ VMFault a [0, vmFaultTypeFSR RISCVStoreAccessFault]);
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instrf = (\<lambda>a. throwError $ ArchFault $ VMFault a [1, vmFaultTypeFSR RISCVInstructionAccessFault]);
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set_pc = do
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faultip \<leftarrow> as_user thread $ getRegister FaultIP;
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as_user thread $ setRegister NextIP faultip
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od
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instrf = (\<lambda>a. throwError $ ArchFault $ VMFault a [1, vmFaultTypeFSR RISCVInstructionAccessFault])
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in
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case fault_type of
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RISCVLoadPageFault \<Rightarrow> loadf addr
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| RISCVLoadAccessFault \<Rightarrow> loadf addr
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| RISCVStorePageFault \<Rightarrow> storef addr
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| RISCVStoreAccessFault \<Rightarrow> storef addr
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| RISCVInstructionPageFault \<Rightarrow> doE
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liftE set_pc;
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instrf addr
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odE
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| RISCVInstructionAccessFault \<Rightarrow> doE
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liftE set_pc;
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instrf addr
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odE
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| _ \<Rightarrow> fail (* FIXME RISCV: SELFOUR-1955 *)
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RISCVLoadPageFault \<Rightarrow> loadf addr
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| RISCVLoadAccessFault \<Rightarrow> loadf addr
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| RISCVStorePageFault \<Rightarrow> storef addr
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| RISCVStoreAccessFault \<Rightarrow> storef addr
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| RISCVInstructionPageFault \<Rightarrow> instrf addr
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| RISCVInstructionAccessFault \<Rightarrow> instrf addr
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odE"
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text \<open>
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