Commit Graph

22 Commits

Author SHA1 Message Date
Edward Pierzchalski 2035f444a0 refine: Remove unused lemmas. 2019-05-28 10:00:10 +10:00
Victor Phan 834dd88681 refine: remove as_user_valid_etcbs from architecture specific files
as_user_valid_etcbs can be reasoned in an architecture generic setting.
2019-04-18 14:32:08 +10:00
Victor Phan d707c97df9 arm refine: update for new definition of set_object 2019-04-18 14:32:08 +10:00
Rafal Kolanski c02d0406f5 arm refine: update for GrantReply (SELFOUR-6)
Initial setup and sorrying by Thibaut Perami.
2018-12-10 20:01:37 +11:00
Gerwin Klein fa553b8085 aspec/refine: remove redundant captransfer_size definition 2018-08-20 09:06:37 +10:00
Gerwin Klein 6b9d9d24dd Isabelle2018: new "op x" syntax; now is "(x)"
(result of "isabelle update_op -m <dir>")
2018-08-20 09:06:35 +10:00
Gerwin Klein 011e08458e Isabelle2018: new comment syntax
(result of "isabelle update_comments <dirs>")
2018-08-20 09:06:35 +10:00
Corey Lewis c686d6e776 lib: Make Crunch more effective at applying supplied rules 2018-06-08 15:48:32 +10:00
Corey Lewis 2d0baab462 Proof update for crunch changes 2018-04-04 14:13:55 +10:00
Thomas Sewell 0f38e20094 Many proof repairs. 2018-03-16 14:57:51 +11:00
Thomas Sewell 652cbb966e Initial proof updates for combinator changes. 2018-03-16 14:53:22 +11:00
Gerwin Klein 2d9de5b9a6 ARM refine: proof update for user_context refactor 2018-03-08 18:41:28 +11:00
Miki Tanaka 2a1beffac1 arm: update for simple_ko getter/setter 2017-12-14 18:02:48 +11:00
Rafal Kolanski 3a22487cf3 arm: revise scheduler / fastpath / scheduler bitmaps (SELFOUR-242)
Colloquially known as "invert-fastpath".

Update verification efforts on ARM for the following seL4 changes:
- scheduling decisions done in possibleSwitchTo are moved to the
  scheduler
  - possibleSwitchTo only checks whether the candidate is valid for a
    fast switch, not its priority, accepting possible candidates
    immmediately as a switch-to scheduler action
  - the scheduler checks the candidate against the current thread and
    against the bitmaps before making a decision
  - attemptSwitchTo and switchIfRequiredTo are gone
  - scheduler is now more complicated, and numerous proofs related to it
    are rewritten from scratch
- fast path now checks ready queues via the scheduler bitmaps
- L2 scheduler bitmap order reversed for better cache locality

Many iterations between the kernel and verification teams were needed
to get this right.
2017-11-27 22:05:34 +11:00
Matthew Brecknell 48b3a8b4ca update object and field widths for x64, and remove some magic numbers
In X64 update the following to match the C kernel:
  - TCB size-bits (11).
  - Endpoint size-bits (4).
  - Guard bits (58).
  - Message registers.

For all architectures, replace magic numbers with defined constants in
specifications, and as far as possible in proofs:
  - tcb_bits in abstract spec.
  - tcbBlockSizeBits, cteSizeBits, ntfnSizeBits, epSizeBits in Haskell
    spec, Haskell and C refinement proofs.
2017-10-26 14:05:35 +11:00
Alejandro Gomez-Londono 796887d9b1 Removes all trailing whitespaces 2017-07-12 15:13:51 +10:00
Alejandro Gomez-Londono b76709967b arm refine: Updating theories for ainvs changes 2017-06-19 14:32:44 +10:00
Joel Beeren 71e2db88a4 arm: refactor sanitise_register to take a bool instead of a kernel_object
This simplified the sanitise_register logic in CRefine for arm-hyp.
2017-05-03 21:51:57 +10:00
Miki Tanaka 7ad3ef3b3e wp: update the proofs for the new wp/wpc/wpsimp 2017-03-16 19:39:11 +11:00
Matthew Brecknell c0c52700fb trivial: rename split_if to if_split following Isabelle2016-1 2017-03-09 11:59:33 +11:00
Gerwin Klein 520921351a provide TCB argument for sanitiseRegister
Other platforms such as arm-hyp will need to look into additional TCB state
such as VCPU in sanitiseRegister. This commit provides the scaffolding for
that.
2017-02-12 12:54:42 +11:00
Rafal Kolanski 7657681fca move refine/* to refine/ARM/*, parametrise over $L4V_ARCH 2017-01-30 12:22:22 +11:00