Commit Graph

96 Commits

Author SHA1 Message Date
Victor Phan 285c47f622 cleanup for crunch_ignore in refine and crefine for all arches
Several constants are are added to the top level crunch_ignore statement in
Bits_R.thy, then removed from individual crunch statements across Refine and
CRefine.
2020-02-03 16:29:18 +11:00
Gerwin Klein 430f2c525b crefine: invocation label proof updates 2020-02-03 12:56:19 +08:00
Victor Phan b9c285400d remove diminished (VER-1158)
diminished takes two caps and asserts that one is equal to the other
except that one may have fewer rights. We remove this definition and all
references to it, replacing diminished with equality.
2019-11-16 01:03:36 +11:00
Gerwin Klein 1970ed0ce0 word_lib internal + crefine: remove duplicate lemma 2019-11-15 12:08:22 +11:00
Gerwin Klein c390ba7404 proofs: adjustments for word_lib changes 2019-11-15 12:08:22 +11:00
Corey Lewis 9846cd42bb proof: update for crunch changes 2019-10-14 17:23:41 +11:00
Corey Lewis dd48e0d899 proof: update for wp changes
Updated 'wp_once' to 'wp (once)' and removed several stray uses of 'wp_trace'.
2019-10-14 17:12:18 +11:00
Victor Phan d1637c06ce arm crefine: update for PageMap replacing PageRemap (SELFOUR-161) 2019-10-10 11:27:14 +11:00
MiladKetabi acbc08b836 clean-ups done during proof update for the jira issue SELFOUR-1187: seL4 setPriority should attempt a direct schedule 2019-10-06 18:31:19 +11:00
MiladKetabi d934d25269 proof update for SELFOUR-1187: seL4 setPriority should attempt a direct schedule
Prior to this commit the kernel would always trigger a full reschedule
on setPriority. This change allows the kernel to attempt a direct
switch, avoiding invoking the scheduler.
2019-10-06 18:31:19 +11:00
Japheth Lim da2081631b CRefine: minor fixes for MCS kernel merge
We need to make small adjustments because the kernel will see minor
changes to variable initialisation, even in the non-MCS build.
2019-08-22 11:22:29 +10:00
Edward Pierzchalski 9852fcccd2 crefine: disambiguate record fields.
When the bitfield generator switches to python 3, the dicts we use to
track data won't be iterated deterministically. These changes
disambiguate (some) record literals and accessors so that they aren't
sensitive to the definition order.
2019-07-25 11:58:12 +10:00
Amirreza Zarrabi 4f93ebe608 refine, crefine: update after adding thread id registers to TCB for SELFOUR-1524 2019-06-28 11:48:24 +10:00
Matthew Brecknell b3c4a56e01 crefine: type-qualify overloaded C struct constructor names
Changes in the C boot code mean that `tcb_C` and `asid_pool_C` are now
overloaded in the Isabelle C specification: They are constructors for
the respective C structs, and also accessors for fields of an unrelated
struct (`root_server_mem_t`). Consequently, we need to be more explicit
when naming the constructors.
2019-06-20 11:05:27 +10:00
Gerwin Klein c34840d09b global: isabelle update_cartouches 2019-06-14 11:41:21 +10:00
Gerwin Klein 2e6bf613e2 crefine: c-parser cleanup fallout 2019-06-14 11:41:20 +10:00
Michael McInerney c13432b0c4 misc updates for Isabelle2019 2019-06-14 11:41:20 +10:00
Michael McInerney 32a3ebba1c crefine: update for Isabelle2019 2019-06-13 16:22:33 +10:00
Michael McInerney 4463e9750e SELFOUR-1198: update proofs for correct restart PC
Fixes a case where a thread can go from Running->Inactive->Restart and
use a restart PC that is out of date. An out of date restart PC occurs
when a thread was transitioned to running after being in a blocked
state, but was never scheduled and so did not execute the traps code
that updates the restart PC.

This also renames relevant register names for consistency across
architectures (FaultIP and NextIP).
2019-06-13 11:43:50 +10:00
Matthew Brecknell 9f94d3ccb3 crefine: update for renamed NextIP and FaultIP registers
The ARM C kernels have renamed the LR_svc and FaultInstruction registers
to NextIP and FaultIP respectively, for consistency with x86 kernels. A
patch for a similar renaming in the abstract and Haskell specifications
is forthcoming.
2019-05-29 16:52:59 +10:00
Edward Pierzchalski 2035f444a0 refine: Remove unused lemmas. 2019-05-28 10:00:10 +10:00
Matthew Brecknell 175c612f3f crefine: use mangled names in memzero and memset
This is required by a C kernel patch (to refactor some boot code) which
caused the Isabelle C parser to mangle the names of some local
variables.
2019-05-15 14:49:20 +10:00
Matthew Brecknell 503f7ce7de crefine: update proofs for statically allocated IRQ node
Previously, the C kernel maintained a global pointer to the IRQ node.
This pointer was only initialised during boot, when the actual IRQ node
was dynamically allocated from untyped memory.

The C kernel now includes a statically allocated IRQ node, which is just
a suitably sized array of CTEs. This commit updates the proofs to verify
this change to the C kernel.
2019-05-03 13:52:52 +10:00
Matthew Brecknell 206ee07c58 crefine: add abbreviations for global page table addresses 2019-05-03 13:52:52 +10:00
Matthew Brecknell f47f1c6446 cleanup: move pt_Ptr etc up to Wellformed_C 2019-05-03 13:52:52 +10:00
Matthew Brecknell 009c0c98b5 cleanup: remove some redundant uses of if_1_0_0 2019-05-03 13:52:52 +10:00
Matthew Brecknell 17b0aca539 cleanup: remove duplicate cap_get_tag_isCap_ArchObject2 lemmas 2019-05-03 13:52:52 +10:00
Matthew Brecknell f1901beee0 cleanup: remove duplicates of invs'_invs_no_cicd 2019-05-03 13:52:52 +10:00
Matthew Brecknell eedf3d8fa2 cleanup: remove duplicates of objBitsKO_gt_0 2019-05-03 13:52:52 +10:00
Rafal Kolanski a34e0fc6f8 arm crefine: update for GrantReply (SELFOUR-6) 2018-12-10 20:01:37 +11:00
Edward Pierzchalski 3d49538f2f arm crefine: mark some lemmas as FIXME.
There are some good simp set candidates as well as ones that should be
moved.
2018-11-21 17:12:23 +11:00
Edward Pierzchalski 17f3263d5e arm crefine: remove some unused lemmas.
Add some comments on unused lemmas that we want to move or keep.
2018-11-21 17:12:23 +11:00
Edward Pierzchalski c4dc578bc3 Fix up proofs after word lemma moves 2018-10-10 14:15:01 +11:00
Edward Pierzchalski d75740201c Remove pure word lemmas from proof/*
Removes redundant lemmas after moving them up to Word_Lib.
2018-10-10 14:15:00 +11:00
Mitchell Buckley 8173a37c2d Updated specs and proofs for SELFOUR-1491: control IRQ triggering on ARM. 2018-09-19 16:18:09 +10:00
Ilya Yanok 0044c57e14 lib: change runErrorT to runExceptT to match Haskell code 2018-09-04 14:59:45 +10:00
Gerwin Klein 934ba36fd1 lib/clib: move DetWPLib from CLib to Lib
Doesn't have any C dependencies.
2018-08-20 09:06:37 +10:00
Gerwin Klein a1d1b69776 Isabelle2018 arm: CRefine 2018-08-20 09:06:37 +10:00
Gerwin Klein 6b9d9d24dd Isabelle2018: new "op x" syntax; now is "(x)"
(result of "isabelle update_op -m <dir>")
2018-08-20 09:06:35 +10:00
Gerwin Klein 011e08458e Isabelle2018: new comment syntax
(result of "isabelle update_comments <dirs>")
2018-08-20 09:06:35 +10:00
Gerwin Klein b5cdf4703f globally use session-qualified imports; add Lib session
Session-qualified imports will be required for Isabelle2018 and help clarify
the structure of sessions in the build tree.

This commit mainly adds a new set of sessions for lib/, including a Lib
session that includes most theories in lib/ and a few separate sessions for
parts that have dependencies beyond CParser or are separate AFP sessions.
The group "lib" collects all lib/ sessions.

As a consequence, other theories should use lib/ theories by session name,
not by path, which in turns means spec and proof sessions should also refer
to each other by session name, not path, to avoid duplicate theory errors in
theory merges later.
2018-08-20 09:06:34 +10:00
Gerwin Klein 5ae7cc23b1 aspec: msg_align_bits and related are arch independent
While the numerical value is arch dependent, the definition and symbolic value
are not. This commit factors out the symbolic computation and only unfolds the
numeric value in the architecture dependent spec.
2018-08-06 11:22:51 +10:00
Michael Sproul e5ecf10b14 arm+arm_hyp: crefine: use ccorres_disj_division from lib 2018-07-05 16:23:15 +10:00
Matthew Brecknell b9efd5f7b2 clib: infrastructure for using AutoCorres in CRefine 2018-07-05 16:23:15 +10:00
Corey Lewis c71fa27e14 Whitespace and typos 2018-07-03 13:42:23 +10:00
Corey Lewis 571ef6d0ca crefine+drefine+access+infoflow: update proofs for SetTLSBase (VER-807) 2018-07-03 13:42:22 +10:00
Rafal Kolanski 15d6b62040 arm: address setCurrentPD mismatch between abstract/haskell/C
ARM setCurrentPD was recently refactored as part of multi-VM support for
ARM_HYP. The Haskell was updated correctly, and the C was not.
Unfortunately, setCurrentPD was manually redefined in MachineOps.thy for
ARM hiding the change, making the C look correct when it wasn't.

We scrap the second definition of setCurrentPD, load it from the Haskell,
and have an abstract set_current_pd that's a bit simpler to refine down
from.

The proofs are updated for the above change and the update to the C
setCurrentPD that was breaking on KZM.
2018-06-22 11:59:30 +10:00
Joel Beeren 5cff1d47ac crefine: fix finaliseCap proof for 1ul shift change 2018-04-27 07:12:09 +10:00
Joel Beeren 1634608453 arm: ioportcontrol: Fixes after adding IOPortControlCaps to x64 2018-04-19 05:27:06 +10:00
Thibaut Perami 4c7ca8c076 arm+arm_hyp crefine: Split TLB functions to local and local+remote functions 2018-04-19 11:12:27 +10:00