Commit Graph

128 Commits

Author SHA1 Message Date
Corey Lewis 5323aad95a refine: remove duplicated lemmas
Signed-off-by: Corey Lewis <Corey.Lewis@data61.csiro.au>
2021-03-11 10:42:49 +11:00
Corey Lewis 008969fc02 lib proof: reorder the assumptions of corres_split
Currently this just modifies the rule but not any of the proofs that use
it. The old version is kept for now but should be removed once all of
the proofs are updated.

Signed-off-by: Corey Lewis <Corey.Lewis@data61.csiro.au>
2021-02-19 11:37:12 +11:00
Rafal Kolanski 0df39b8ed5 riscv: update for platform constant changes
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-11-16 16:52:40 +11:00
Corey Lewis 7baa19495f spec proof: resolve_address_bits'.simps[simp del]
Remove resolve_address_bits'.simps from the simp set at the definition
site, instead of in the middle of the proofs.

Signed-off-by: Corey Lewis <Corey.Lewis@data61.csiro.au>
2020-11-09 17:18:41 +11:00
Gerwin Klein a45adef66a all: remove theory import path references
In Isabelle2020, when isabelle jedit is started without a session
context, e.g. `isabelle jedit -l ASpec`, theory imports with path
references cause the isabelle process to hang.

Since sessions now declare directories, Isabelle can find those files
without path reference and we therefore remove all such path references
from import statements. With this, `jedit` and `build` should work with
and without explicit session context as before.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-11-02 10:16:17 +10:00
Gerwin Klein 300d62e6b3 riscv refine: update to Isabelle2020
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Gerwin Klein 4c3bbfb059 refine: session directories for Isabelle2020
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Gerwin Klein e7fb36b7e2 ROOT files: file reorg for new ROOT requirements
Isabelle2020 requires each session to declare it own set of directories that
may not overlap with other session's directories. This commit reorganises
files to comply with that requirement.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Miki Tanaka 0b9c186eb0 armhyp/x64/riscv64 refine: remove interrupt/irq from p_monad
- fix armhyp/x64/riscv64 Refine for the above change

Signed-off-by: Miki Tanaka <miki.tanaka@data61.csiro.au>
2020-10-25 13:15:00 +11:00
Matthew Brecknell b77f83c57b riscv: rename sbadaddr -> stval
Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2020-08-26 15:24:06 +10:00
Gerwin Klein 4782dc369b
lib/riscv refine: move lemma (#33)
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-08-10 09:14:27 +08:00
Gerwin Klein b356f65969 lib: in_case and find_case methods
We already have find_goal, but the interface is a bit too unwieldy to
casually use frequently. This commit introduces (or moves from RISCV)
two methods on top of find_goal:

 - `in_case x`: asserts the goal has an assumption `?t = x`
 - `find_case x`: finds a goal such that `in_case x`

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-07-13 11:59:43 +08:00
Gerwin Klein c3f3656942 refine + crefine: proof updates for haskell datatype selectors
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-07-09 10:06:31 +08:00
Gerwin Klein 5ee37bd11e refine: replace DomainTime_R by assertion
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-07-02 11:30:56 +08:00
Rafal Kolanski 99d241d031 riscv: clear out most crefine FIXMEs
Perform moves, remove lemmas placed in lib, etc.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:11 +08:00
Gerwin Klein 81117dc587 riscv cleanup: remove stray diagnostic commands
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 10457db1b5 riscv orphanage: adapt to new arch split function
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 62e52c84cb riscv refine: adapt to new arch split function
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 0bdec8a194 riscv refine: adjust proofs to new invokeIRQHandler
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 8e60a9af3e riscv refine: prove new lookupPTFromLevel assertion
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 4ecd369a2d riscv refine: adjust proof for modified assertions
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein 8e4cc14c55 riscv refine: update proof for potential InvalidPTE mappings
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein 14206e2536 riscv refine: prove new Haskell assertions
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein 70ee5750f6 riscv haskell+refine: add assertion to setVMRoot
The assertion is provable from the abstract invariants, and used in
CRefine to conclude that the test wether the vspace root cap is mapped
can be left out.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein cd82381ae2 riscv refine: add irq ~= irqInvalid to valid_cap'
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski e93a475bd6 riscv refine: update for tcbBlockSizeBits == 10
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein 71e7f87614 haskell/refine/crefine: rename isBlocked to isStopped
sync with corresponding change in C

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-05-06 15:49:02 +10:00
Gerwin Klein 2574ea6bc0 refine: remove duplicate update rule
makes use of the actual warning in add_upd_simps that was hidden in the
noise before.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-05-04 17:03:09 +08:00
Victor Phan 190d3b402a riscv spec/ainvs: update IRQs to target hifive platform
- Increase IRQ word size from 3 to 6 to match IRQ_CNODE_SLOT_BITS in
  sel4 config.
- Bump maxIRQ up to 54.
- Fix broken inequality proof by changing constant that depended on IRQ
  word size.
2020-03-27 15:50:46 +11:00
Gerwin Klein a424d55e3e licenses: convert license tags to SPDX 2020-03-13 14:38:24 +08:00
Victor Phan 966734c69b Collect abstract lemmas in Refine
Create ArchMove_R.thy for transporting arch specific lemmas (and generic
lemmas that are used somewhat specifically by one architecture) to theory
files before Refine.

Create Move_R.thy as an arch generic Refine theory file for transporting
generic lemmas to theory files before Refine.

Also delete some lemmas that have existed earlier already or are not
needed.

Rename Move.thy in CRefine to Move_C.thy for consistency.
2020-02-21 11:49:25 +11:00
Victor Phan f2d1f5ada7 refine/crefine: convert crunch with multiple constants into crunches 2020-02-03 16:29:19 +11:00
Victor Phan 285c47f622 cleanup for crunch_ignore in refine and crefine for all arches
Several constants are are added to the top level crunch_ignore statement in
Bits_R.thy, then removed from individual crunch statements across Refine and
CRefine.
2020-02-03 16:29:18 +11:00
Gerwin Klein 54f557f2b2 refine: invocation label proof updates 2020-02-03 12:56:19 +08:00
Victor Phan b9c285400d remove diminished (VER-1158)
diminished takes two caps and asserts that one is equal to the other
except that one may have fewer rights. We remove this definition and all
references to it, replacing diminished with equality.
2019-11-16 01:03:36 +11:00
Gerwin Klein c390ba7404 proofs: adjustments for word_lib changes 2019-11-15 12:08:22 +11:00
Gerwin Klein b820b13d06 riscv: avoid automatic unfolding of handle_vm_fault
(fun -> definition)
2019-11-15 12:04:50 +11:00
Victor Phan f8b7f61445 riscv refine: update and close sorries for adding IRQ invocations
irqInvalid is manually requalified into Interrupt_R. If it's defined for all
architectures, then can be requalified instead in the more suitable
spec/machine/MachineExports.thy

Reimplement the following primrecs:
- arch_irq_control_inv_relation
- arch_irq_control_inv_valid'
- irq_control_inv_valid'

Add the following lemmas:
- arch_check_irq_corres
- crunches arch_check_irq, checkIRQ
- arch_check_irq_valid
- arch_check_irq_valid'
- no_fail_setIRQTrigger
- setIRQTrigger_corres
- dmo_setIRQTrigger_invs'
2019-11-12 18:28:40 +11:00
Victor Phan 3ef1e6845c riscv refine: update after adding thread id registers to TCB 2019-11-12 18:28:40 +11:00
Victor Phan e4d83b313a riscv refine: update for PageMap replacing PageRemap (SELFOUR-161) 2019-11-12 18:28:40 +11:00
Gerwin Klein a5e27933a5 riscv: cleanup; resolve remaining FIXMEs 2019-11-12 18:28:40 +11:00
Gerwin Klein d2584a3692 cleanup: collect word lemmas 2019-11-12 18:28:40 +11:00
Gerwin Klein cbc31e31e1 ainvs+refine: provide def of mask_range in InvariantsPre
(used to be ptr_range in riscv, which is too overloaded)
2019-11-12 18:28:40 +11:00
Gerwin Klein 9d81f85c38 riscv: force vptr alignment in PTMap decode
Instead of checking for alignment, mask out the bottom bits to force the
vptr stored in the cap into the correct alignment for the level to be mapped.

See also SELFOUR-2162
2019-11-12 18:28:39 +11:00
Gerwin Klein 12f2d82f86 riscv refine: Orphanage sorry-free 2019-11-12 18:28:39 +11:00
Gerwin Klein bda92556d7 riscv refine: sorried Orphanage 2019-11-12 18:28:39 +11:00
Gerwin Klein aae4ea5ad0 riscv refine: add EmptyFail_H 2019-11-12 18:28:39 +11:00
Gerwin Klein 72032d8495 riscv refine: cleanup in Finalise_R 2019-11-12 18:28:39 +11:00
Gerwin Klein d06030a524 riscv refine: cleanup in Syscall_R 2019-11-12 18:28:39 +11:00
Gerwin Klein d28bda221f riscv refine: cleanup in ADT_H 2019-11-12 18:28:39 +11:00