Commit Graph

171 Commits

Author SHA1 Message Date
Gerwin Klein ead3e6fdc4 aspec: message_info_to_data is mostly arch independent
Factored out msg_label_bits, which is the only architecture specific part.
2018-08-06 11:22:51 +10:00
Matthew Brecknell a3de401c09 x64: more abstract specs and invariants for ASIDs 2018-07-05 16:23:15 +10:00
Maksym Bortin 9d315cda20 ainvs+refine: update proofs for SetTLSBase (VER-807) 2018-07-03 13:42:19 +10:00
Corey Lewis 97c24b95c9 ainvs: Add itcb_arch to the itcb projection
This allows us to more easily show that arch specific tcb fields are
preserved by many functions of the spec. For ARM_HYP we add a
projection for the tcb_vcpu field.
2018-06-27 11:48:56 +10:00
Corey Lewis d77d31a77c lib: Refactor crunch so that it can be used for both the nondet monad and the trace monad 2018-06-26 14:45:28 +10:00
Rafal Kolanski 15d6b62040 arm: address setCurrentPD mismatch between abstract/haskell/C
ARM setCurrentPD was recently refactored as part of multi-VM support for
ARM_HYP. The Haskell was updated correctly, and the C was not.
Unfortunately, setCurrentPD was manually redefined in MachineOps.thy for
ARM hiding the change, making the C look correct when it wasn't.

We scrap the second definition of setCurrentPD, load it from the Haskell,
and have an abstract set_current_pd that's a bit simpler to refine down
from.

The proofs are updated for the above change and the update to the C
setCurrentPD that was breaking on KZM.
2018-06-22 11:59:30 +10:00
Joel Beeren 1634608453 arm: ioportcontrol: Fixes after adding IOPortControlCaps to x64 2018-04-19 05:27:06 +10:00
Corey Lewis 2d0baab462 Proof update for crunch changes 2018-04-04 14:13:55 +10:00
Thomas Sewell 0f38e20094 Many proof repairs. 2018-03-16 14:57:51 +11:00
Thomas Sewell 652cbb966e Initial proof updates for combinator changes. 2018-03-16 14:53:22 +11:00
Gerwin Klein 8601dce656 ARM ainvs: proof update for user_context refactor 2018-03-08 18:41:28 +11:00
Michael Sproul f0795805d1 SELFOUR-1016: fix confused deputy problem when setting priorities 2018-02-26 11:19:43 +11:00
Joel Beeren 4601f2a1ab Genericise deletion actions that occur after empty_slot
This patch adds a generic "post_cap_deletion" step that is called by
finalise_slot. Previous to this, the only caps which had actions
required at this stage were IRQHandlerCaps -- it was required that the
IRQ bitmap be updated after the cap itself was removed (as the
invariants state that for any existing IRQHandlerCap, the corresponding
bit in the IRQ bitmap must be set).

By genericising this, we add the capacity for new, arch-specific post
cap deletion actions to occur in the future.
2018-02-23 09:12:55 +11:00
Miki Tanaka 4efe5392f7 arm ainvs: fix a typo 2018-01-30 12:00:21 +11:00
Matthew Brecknell 2f540e802c add constant definitions for bounds on untyped object sizes 2017-12-18 12:58:27 +11:00
Miki Tanaka b37bc04463 arm ainvs: wp rules for simple_ko setter/getter 2017-12-14 18:02:44 +11:00
Miki Tanaka 3841b6e8ba arm : add AEndpoint and ANTFN a_type simplification
in addition to the a_type ATCB simplification, the following two are now in the simpset:
  "a_type (Endpoint x) = AEndpoint"
  "a_type (Notification v) = ANTFN"
2017-12-14 07:17:27 +11:00
Joel Beeren a5a5edc832 VER-849: abstractly declare a threads registers have changed
This removes an ifdef present in invokeTCB_(Copy|Write)Registers, and
adds the function Arch_postModifyRegisters which does nothing on any
arch except x86-64.
2017-12-13 12:13:36 +11:00
Rafal Kolanski 3a22487cf3 arm: revise scheduler / fastpath / scheduler bitmaps (SELFOUR-242)
Colloquially known as "invert-fastpath".

Update verification efforts on ARM for the following seL4 changes:
- scheduling decisions done in possibleSwitchTo are moved to the
  scheduler
  - possibleSwitchTo only checks whether the candidate is valid for a
    fast switch, not its priority, accepting possible candidates
    immmediately as a switch-to scheduler action
  - the scheduler checks the candidate against the current thread and
    against the bitmaps before making a decision
  - attemptSwitchTo and switchIfRequiredTo are gone
  - scheduler is now more complicated, and numerous proofs related to it
    are rewritten from scratch
- fast path now checks ready queues via the scheduler bitmaps
- L2 scheduler bitmap order reversed for better cache locality

Many iterations between the kernel and verification teams were needed
to get this right.
2017-11-27 22:05:34 +11:00
Thomas Sewell 8753c05b20 Expand eval_bool; add a method word_eqI_solve.
A number of proofs begin with word_eqI followed by some similar steps,
suggesting a 'word_eqI_solve' proof method, which is implemented here.

Many of these steps are standard, however a tricky part is that constants of
type 'nat' which encode a particular number of bits must often be unfolded.
This was done by expanding the eval_bool machinery to add eval_int_nat, which
tries to evaluate ints and nats.

Testing eval_int_nat revealed the need to improve the code generator setup
somewhat. The Arch locale contains many of the relevant constants, and they are
given global names via requalify_const, but the code generator doesn't know
about them. Some tweaks make them available. I *think* this is safe for
arch_split, as long as the proofs that derive from them are true in each
architecture.
2017-11-01 17:30:46 +11:00
Matthew Brecknell 4f68967bfc Isabelle2017: update AInvs for RC0
* word_eqI is no longer rule_format.

  * Updated Isabelle/ML Thm.join_proofs to Thm.consolidate.

  * Updated suffix_refl to suffix_order.order.refl.

  * Removed some lines of proofs, thanks to improved simplifier.
2017-10-30 12:23:26 +11:00
Matthew Brecknell 48b3a8b4ca update object and field widths for x64, and remove some magic numbers
In X64 update the following to match the C kernel:
  - TCB size-bits (11).
  - Endpoint size-bits (4).
  - Guard bits (58).
  - Message registers.

For all architectures, replace magic numbers with defined constants in
specifications, and as far as possible in proofs:
  - tcb_bits in abstract spec.
  - tcbBlockSizeBits, cteSizeBits, ntfnSizeBits, epSizeBits in Haskell
    spec, Haskell and C refinement proofs.
2017-10-26 14:05:35 +11:00
Pang Luo 6b9912c47a manually adjust non-obvious cases of tab to space replacement 2017-10-20 14:22:36 +11:00
Matthew Brecknell 184d6b70b7 remove most tab characters 2017-10-20 14:22:36 +11:00
Thomas Sewell 2c0820c175 Improve arch-split for BCorres2_AI changes. 2017-10-10 11:02:19 +11:00
Matthew Brecknell b8fc532b4e reject all invalid IRQ inputs to IRQ control syscall
This updates the proofs for a change in the C code. The IRQ control
syscall now returns an error whenever the IRQ parameter is not a valid
IRQ value. Previously, the syscall threw away some higher-order bits
before checking for IRQ validity.

Incidentally, the C now only uses the name `irq` for variables of type
`irq_t`, and `irq_w` for variables of type `word_t`. This avoids trouble
with c-parser name mangling.
2017-10-05 07:59:02 +11:00
Miki Tanaka 55d50c7ba9 arm/arm_hyp ainvs: rename wellformed_arch_obj to arch_valid_obj 2017-08-18 09:49:11 +10:00
Miki Tanaka 6d8e917087 Remove valid_arch_objs
now that we have valid_vspace_objs to express validiy of
vspace objects, we do not need valid_arch_objs: we have
valid_objs to state the validity of non-vspace arch objects.
2017-08-17 22:44:23 +10:00
Matthew Brecknell 8c549b6764 x64: remove all trailing whitespace 2017-08-11 14:19:39 +10:00
Matthew Brecknell 2f70a304da ainvs: integrate all architectures 2017-08-09 16:57:39 +10:00
Matthew Brecknell 238e8b307e x64: merge master 2017-07-21 11:27:12 +10:00
Alejandro Gomez-Londono 796887d9b1 Removes all trailing whitespaces 2017-07-12 15:13:51 +10:00
Joel Beeren 81064fdb55 idle-thread-pd: run idle thread with the global PD all the time.
This avoids the multicore scenario of the idle thread running in the
address space that has been deleted by a thread running on another core.
2017-07-11 11:29:34 +10:00
Joel Beeren 392d055e99 SELFOUR-748: rename tlb invalidation functions 2017-06-20 14:05:45 +10:00
Joel Beeren 7d4a7b5f64 arm ainvs: clear sorry in ArchAcc_AI 2017-06-19 14:32:44 +10:00
Alejandro Gomez-Londono fb9de60cfe arm ainvs: Update for create_mapping_entries changes 2017-06-19 14:32:44 +10:00
Joel Beeren a6304f8ef7 arm ainvs: update arch stuff to match generic for top level ainvs files 2017-06-19 14:32:44 +10:00
Joel Beeren 702bfecd5a ainvs: reintroduce second_level_tables all over the place, update generic Arch_AI and various ArchArch_AI's to match 2017-06-19 14:32:44 +10:00
Alejandro Gomez-Londono 7ed3df02e6 arm ainvs: updated proofs in ArchBCorres2 + KernelInit + ArchInterrupt 2017-06-19 14:32:44 +10:00
Joel Beeren f492f85471 ainvs: added back in second_level_tables for Untyped, ported changes to ARM_HYP also 2017-06-19 14:32:43 +10:00
Joel Beeren 5e6740464d arm ainvs: added necessary locale assumptions in ArchIpc_AI 2017-06-19 14:32:43 +10:00
Miki Tanaka 993f6a0120 arm ainvs: Updated up to ArchFinalise_AI 2017-06-19 14:32:43 +10:00
Joel Beeren 71e2db88a4 arm: refactor sanitise_register to take a bool instead of a kernel_object
This simplified the sanitise_register logic in CRefine for arm-hyp.
2017-05-03 21:51:57 +10:00
Joel Beeren 73cf43d8c3 x64: make word lemmas arch agnostic-ish 2017-04-12 18:10:13 +10:00
Matthew Brecknell 659088cc13 x64: merge master 2017-03-29 20:22:12 +11:00
Matthew Brecknell bf077ac664 ainvs x64 arm: remove canonical_address check from do_user_op
For x64, move the check to get_page_info, which is arch-specific.

This means there is no longer any need for canonical_address to be
defined for ARM.
2017-03-28 17:35:59 +11:00
Matthew Brecknell 6f3efc504a arch_split x64 arm: make endpoint_bits and ntfn_bits arch constants 2017-03-27 19:07:42 +11:00
Matthew Brecknell bb92e92f52 arch_split x64 arm: make cte_level_bits an arch constant 2017-03-27 19:07:28 +11:00
Gerwin Klein a2de84cf3d ainvs: repair wp_pre fallout 2017-03-16 19:39:11 +11:00
Matthew Brecknell 42ff16ed4c x64: fix sorry proofs in ArchAInvsPre_AI
The canonical_address constant (but not its definition) is now exported
to generic theories, and used in do_user_op. On ARM, all virtual
addresses are canonical.
2017-03-15 17:37:20 +11:00