Commit Graph

866 Commits

Author SHA1 Message Date
Matthew Brecknell fd01872121 always use `addrFromKPPtr` for kernel addresses
This verifies a C kernel patch (seL4/seL4#409) which consolidates
translation between virtual and physical addresses, and makes it
consistent across architectures. In particular, we always use
`addrFromKPPtr`, even on architectures that don't use a distinct region
to map the kernel ELF. This will facilitate future improvements which
move the ELF mapping into a distinct virtual address region.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-06-25 16:31:22 +10:00
Matthew Brecknell 73649d2ce4 arm crefine: fix `decodeARMMMUInvocation` branch hint
A previous update to C code added a disjunct to an `if` condition
outside the existing `unlikely` branch hint. This commit is the proof
update for a C patch that extends the branch hint to the full `if`
condition.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-05-20 11:52:45 +10:00
Gerwin Klein c0fe17e785 Remove remaining tab characters in .thy files
Closes VER-748

Signed-off-by: Gerwin Klein <kleing@unsw.edu.au>
2021-04-21 13:30:13 +10:00
Matthew Brecknell d020be3b89
riscv: fix CLZ and CTZ for riscv32 builds (#257)
This commit verifies seL4 PR [#325][], which fixes the riscv32 build
broken by seL4 commit [9ec5df5f][].

[#325]: https://github.com/seL4/seL4/pull/325
[9ec5df5]: https://github.com/seL4/seL4/commit/9ec5df5f

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-30 13:17:41 +11:00
Mitchell Buckley 6386f753fa riscv: use `uint8_t` for `register_t`
`register_t` only needs to be able to index into the TCB user context
array, which has 35 entries on RISC-V. Therefore `uint8_t` is
sufficient.

Using the smallest possible type for `register_t` helps with binary
verification. This shrinks static read-only data, which in turn reduces
the complexity of binary verification proof search.

This commit verifies the corresponding C kernel patch.

Co-authored-by: Zoltan Kocsis <Zoltan.Kocsis@data61.csiro.au>
Signed-off-by: Mitchell Buckley <Mitchell.Buckley@data61.csiro.au>
Signed-off-by: Zoltan Kocsis <Zoltan.Kocsis@data61.csiro.au>
2021-03-24 08:47:19 +11:00
Matthew Brecknell 4278e99aa4 riscv crefine: generalise and move some lemmas
Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-23 22:40:46 +11:00
Mitchell Buckley f96f7763fd riscv CRefine: complete proofs for ctz and clz
Signed-off-by: Mitchell Buckley <mitchell.buckley@data61.csiro.au>
2021-03-23 22:40:46 +11:00
Matthew Brecknell 27d6b4f8f4 riscv crefine: setup proofs for clz and ctz
Progress towards verification of new and more efficient implementations
of library functions to could leading and trailing zeros.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-23 22:40:46 +11:00
Matthew Brecknell f902cf7e38 riscv crefine: remove `DONT_TRANSLATE` on inlined function `read_sip`
The binary verification tools perform inlining of C specifications, to
simulate inlining that has been performed in the binary. This means that
`DONT_TRANSLATE` and `inline` are incompatible, since the binary
verification tools require C specifications for any functions that have
been inlined in the binary.

This `DONT_TRANSLATE` annotation was added with a `MODIFIES` annotation
for the proof of `resetUntypedCap_ccorres`. That proof has been reworked
so that it no longer requires the `MODIFIES` annotation in the C.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-19 13:01:44 +11:00
Matthew Brecknell cd6cce2b6f clib: remove unused `csymbr_legacy` method
Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-19 13:01:44 +11:00
Matthew Brecknell 76ec8dfc47 crefine: remove all uses of `csymbr_legacy`
When exception-aware lifting was enabled in `csymbr`, a small number of
existing proofs were broken. The `csymbr_legacy` method was added to
preserve the old behaviour of `csymbr` for those proofs.

This commit updates those proofs to use the new `csymbr` behaviour.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-19 13:01:44 +11:00
Matthew Brecknell 6d5391cf4b crefine: remove large structs passed by value
The RISC-V calling convention specifies that when a C function takes an
argument by value, the binary function should take the argument by
reference, if the value is larger than 2 pointer words.

For binary verification, we avoid implementing this aspect of the RISC-V
calling convention, by eliminating all such function arguments for
functions which are not inlined. This commit includes the proof updates
corresponding to the kernel source update, which is in the seL4
repository.

This includes arguments of types `slot_range_t` and `extra_caps_t`.

`slot_range_t` is only used in two functions, so for those cases, we
unpack the arguments, and remove the type altogether.

`extra_caps_t` is used extensively in invocation decoding, and also in
inter-process communication. Since extra caps are already stored in a
global variable `current_extra_caps`, we remove the function argument,
and use the global variable instead. However, this adds significant
difficulty to the proofs, because the variable lifting performed by
`cinit` worked for the function argument, but not for the global
variable. We have therefore recently improved the `cinit` automation to
support this change to the kernel.

Even though this change was for the benefit of RISC-V binary
verification, we update all architectures for consistency.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-19 13:01:44 +11:00
Matthew Brecknell 337c0d62ea crefine: generalise `ccorres_tmp_lift2`
Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-19 13:01:44 +11:00
Matthew Brecknell 1dfd9d48dd clib: keep preconditions for lifted globals in `cinit`
The previous implementation of `cinit` discarded C preconditions used
for variable lifting. This is usually appropriate for local variables
and function arguments. However, when using the new `cinit` to lift
global variables, the respective preconditions sometimes need to be kept
for the last subgoal.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-19 13:01:44 +11:00
Matthew Brecknell e72bb9976e crefine: enable exception-aware lifting for csymbr
The new variable lifting behaviour that was recently added to the
`cinit`, `clift` and `ctac` commands is now also added to `csymbr`.
This means `csymbr` variable lifting is now sensitive to exceptional
control flow.

Since this breaks some existing proofs, we add a new `csymbr_legacy`
command with the old behaviour, and use it where necessary.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-19 13:01:44 +11:00
Matthew Brecknell 62f5fa0c4f clib: document some predicates used in `ceqv` and related automation
Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-19 13:01:44 +11:00
Matthew Brecknell 9fda5fc5f5 clib: respect exceptional control flow in `cinit` variable lifting
`cinit` and related methods are able to automatically abstract accesses
of Simpl state variables to Isabelle variables, provided they can prove
that the Simpl variable has not been modified up to the point it is
accessed. However, previously, the automation was unaware of exceptional
control flow. This limits the effectiveness of variable lifting in
situations like the following:

    // `var` has not yet been modified.
    if (condition) {
        var = new_value;
        // Here, `var` has been modified.
        return;
    }
    // Has `var` been modified before the following access?
    do_something(var);

Prior to this commit, the answer would be "yes": `cinit` would conclude
that `var` has been modified prior to the access for `do_something`, so
the variable access would not be abstracted.

With this commit, the answer is "no": `cinit` recognises the `return` in
the `if` block, and can abstract the variable access for `do_something`.

The new automation is enabled for `cinit`, `clift` and `ctac`. It is
currently disabled for `csymbr`, since the new behaviour breaks some
existing proofs.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-19 13:01:44 +11:00
Matthew Brecknell d8240dbbda clib: add support for lifting global variables in `cinit`
The `cinit` and `clift` methods already provided a way to abstract
accesses to specified local variables to Isabelle variables that do not
depend on the state, provided that the procedure does not write to those
variables. The proof methods included automation of proofs that the
values of variables being abstracted remain constant throughout the
procedure.

This commit adds support for abstracting accesses to *global* variables.
The additional challenge here is that calls to other procedures might
modify global variables. We use the `modifies` facts produced by the C
parser to determine (and prove) when variables of interest are preserved
across procedure calls.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2021-03-19 13:01:44 +11:00
Corey Lewis 5323aad95a refine: remove duplicated lemmas
Signed-off-by: Corey Lewis <Corey.Lewis@data61.csiro.au>
2021-03-11 10:42:49 +11:00
Gerwin Klein bf5b97500a trivial: fix links to papers
The TS website has settled on no `.pml` postfix

Signed-off-by: Gerwin Klein <kleing@unsw.edu.au>
2021-03-02 11:44:22 +11:00
Corey Lewis 008969fc02 lib proof: reorder the assumptions of corres_split
Currently this just modifies the rule but not any of the proofs that use
it. The old version is kept for now but should be removed once all of
the proofs are updated.

Signed-off-by: Corey Lewis <Corey.Lewis@data61.csiro.au>
2021-02-19 11:37:12 +11:00
Gerwin Klein 8f992b2350 arm_hyp: proof updates for seL4 commit 93ab2543d9d8
The seL4 commit factors out special treatment of specific VCPU
registers, and this commit updates the ARM_HYP proofs accordingly.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-12-19 21:08:30 +11:00
Gerwin Klein 3cc7a1c6b7 arm-hyp: proof updates for seL4 c381c7e14c
seL4 commit c381c7e14c changes cache flushing behaviour for the
verified ARM_HYP configuration. This commit adjusts accordingly.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-12-09 19:46:02 +11:00
Gerwin Klein 83cbc07cd8 crefine: proof update for seL4 7cc50c3039
The corresponding seL4 patch removes an unused line in
invokeUntyped_Retype

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-11-30 16:22:31 +11:00
Gerwin Klein ba38ae33ab update publications links
The links to nicta.com.au have stopped working, so the publication links
now point to the TS publication pages.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-11-23 17:06:46 +11:00
Rafal Kolanski 7d998ac2ba arm+arm-hyp crefine: update for platform constant changes
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-11-16 16:52:40 +11:00
Rafal Kolanski 6a587f7c20 x64: update for platform constant changes
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-11-16 16:52:40 +11:00
Rafal Kolanski 0df39b8ed5 riscv: update for platform constant changes
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-11-16 16:52:40 +11:00
Rafal Kolanski 9ed45e17bd arm+arm-hyp: kernelBase and physMappingOffset renames
This brings the naming convention closer to the other architectures,
closer to the Haskell, and closer to the constant renames that happened
in C. It is, however, quite an invasive change.

kernelBase_addr -> pptrBase
kernelBase -> pptrBase
physMappingOffset -> ptrBaseOffset

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-11-16 16:52:40 +11:00
Gerwin Klein a45adef66a all: remove theory import path references
In Isabelle2020, when isabelle jedit is started without a session
context, e.g. `isabelle jedit -l ASpec`, theory imports with path
references cause the isabelle process to hang.

Since sessions now declare directories, Isabelle can find those files
without path reference and we therefore remove all such path references
from import statements. With this, `jedit` and `build` should work with
and without explicit session context as before.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-11-02 10:16:17 +10:00
Gerwin Klein 9fcb919879 x64 crefine: update for Isabelle2020
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Gerwin Klein 2c2b7c4256 riscv crefine: update to Isabelle2020
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Gerwin Klein eb2de99511 arm-hyp crefine: update to Isabelle2020
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Gerwin Klein 875c313e71 arm crefine: Isabelle2020 update
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Gerwin Klein b976bc8972 crefine: enable intermediate CRefine session for Isabelle2020
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Gerwin Klein 68b71f99b5 crefine: session structure update for Isabelle2020
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Gerwin Klein bbacd7079f proof/ROOT: more Isabelle2020 session structure
SimplExportAndRefine is now split into two steps;
AutoCorresTest moved to its own directory.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Gerwin Klein 2e8cf15b2d lib + proof: Isabelle2020 Method.NO_CONTEXT_TACTIC rename
Method.NO_CONTEXT_TACTIC -> NO_CONTEXT_TACTIC

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-10-27 15:52:31 +10:00
Matthew Brecknell b77f83c57b riscv: rename sbadaddr -> stval
Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2020-08-26 15:24:06 +10:00
Matthew Brecknell ea1be49908 crefine: make C state relation non-empty
We believe this commit fixes the issue described in the previous commit.
It also reverts that commit, since the proofs that the C state relation
is empty no longer work.

As the previous commit demonstrated, it is important to demonstrate the
non-triviality of properties. In this case, we should exhibit a witness
of the non-emptiness of the C state relation. We have not yet done that.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2020-08-19 16:15:05 +10:00
Matthew Brecknell 0f0cfc9dc8 crefine: prove that the C state relation is empty
As currently defined, the C state relation is empty, and consequently,
`ccorres` is trivially true for any pair of functions. This means that,
in a very technical sense, our C refinement proofs are meaningless.

The state relation is empty because several conjuncts in
`cstate_relation` form a contradiction:
- Two conjuncts claim that `intStateIRQNode_array_Ptr` points to a heap
  object within the set of addresses `kernel_data_refs`.
- Another implies that all heap objects are within `domain`.
- Another claims that `kernel_data_refs = -domain`, forming the
  contradiction.

This commit proves the contradiction, and also proves that `ccorres` is
trivially true for any pair of functions.

Fortunately, we never made any essential use of this contradiction, and
so the issue can be fixed fairly easily. The issue seems to have arisen
out of a conflation of two different concepts:
- `kernel_data_refs` is introduced in the intermediate specification,
  and is intended to be the set of addresses containing global heap
  objects that are not covered by capabilities.
- `domain` was introduced for binary verification, and was intended to
  be the set of all addresses that may be used for heap objects.

The easiest fix seems to be to expand the meaning of `kernel_data_refs`
to include all addresses that are not covered by capabilities. If we
assert that `kernel_data_refs = -domain`, then this does not allow for
heap objects that are not covered by capabilities. If instead, we make a
weaker assertion that `-domain <= kernel_data_refs`, we can have heap
objects that are not covered by capabilities, such as the one pointed to
by `intStateIRQNode_array_Ptr`.

This fix will be performed in a subsequent commit.

Signed-off-by: Matthew Brecknell <Matthew.Brecknell@data61.csiro.au>
2020-08-19 16:15:05 +10:00
Gerwin Klein b0d01265ef trivial: fix broken links
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-08-10 15:48:34 +08:00
Gerwin Klein c3f3656942 refine + crefine: proof updates for haskell datatype selectors
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-07-09 10:06:31 +08:00
Gerwin Klein 24b119f338 crefine + infoflowc: adjust proofs for new Haskell assertion
The new kernelExitAssertions need to be threaded through the fastpath
and integrated in the right place in the theorems about callKernel.

In InfoFlowC we have yet another refinement framework, and we're taking apart
callKernel to isolate the `schedule` call which is significant in the
infoflow proof and needs the new assertion inserted as wel. After some force
applied, this does work as well.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-07-02 11:30:56 +08:00
Gerwin Klein 30b43f0af1 riscv crefine: defer parameter name FIXMEs
see also VER-1289

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:11 +08:00
Gerwin Klein d5f0b452ee riscv crefine: defer FIXME
See VER-1288. This is an optimisation that should be
added at a later point.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:11 +08:00
Gerwin Klein c14b2bb69a riscv crefine: resolve FIXME
the definition of objBits is in Haskell, so has to use pteBits instead of
pte_bits (not in scope)

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:11 +08:00
Gerwin Klein 65ae80c5ad riscv crefine: downgrade FIXME to more permanent comment
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:11 +08:00
Rafal Kolanski 4515e1e78e crefine: remove ccorres_from_vcg_throws_nofail
(now present in lib)

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:11 +08:00
Rafal Kolanski 99d241d031 riscv: clear out most crefine FIXMEs
Perform moves, remove lemmas placed in lib, etc.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:11 +08:00
Gerwin Klein e7f6e97c6b cleanup: remove stray diagnostic commands and comments
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 81117dc587 riscv cleanup: remove stray diagnostic commands
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 9a51fc110c riscv crefine: rename isBlocked to isStopped
This brings the proof in sync with seL4 d5d54a0d5596e7a708

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 35d513c0e4 arm crefine: proof updates for new arch split functions
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 232b23e314 x64 crefine: proof updates for new arch split functions
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein d567d52b17 arm_hyp crefine: proof updates for new arch split functions
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 9ddc7c93c2 riscv crefine: cleared last sorry
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 2e2d4c279d riscv crefine: clear last sorry in Interrupt_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 877c667877 riscv crefine: Arch_C sorry-free
Completed decodeRISCVFrameInvocation_ccorres, synced with C changes and
cleaned up a little.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 06d6620340 riscv haskell: update vmRightsToBits
This was incorrect, but unused in the proofs. Once used, the numbers
turned out to be unrelated to the C.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein b7e9f610d9 riscv crefine: prove decodeRISCVMMUInvocation_ccorres
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein bf753fc564 riscv crefine: clear last sorry in Finalise_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski e8f9a341d8 riscv crefine: clear 3 sorries from Arch_C
Notably, decodeRISCVPageTableInvocation_ccorres is done.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 75e82bc006 riscv crefine: prove Arch_decodeIRQControlInvocation_ccorres
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein d8b64d4eb2 riscv crefine: prove decodeIRQControlInvocation_ccorres
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein d7fb06cac1 riscv crefine: prove Arch_finaliseCap_ccorres
Also modifies cap_to_H_PTCap to include capPTMappedAddress

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein aadf599ae5 riscv crefine: remove 1 sorry from Interrupt_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein b17b03befc riscv crefine: clear remaining sorry in Ipc_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein e8ad7ddb72 riscv crefine: clear last sorry in Delete_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 4bc86adab1 riscv crefine: clear final sorry in Arch_C
This includes a slight tweak to the state relation for global PTs.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein fe21162804 riscv crefine: clear all sorries in VSpace_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 6eff34f312 riscv crefine: restrict abstract pools in casid_pool_relation
Since on RISCV64 we do not have restrictions on arch objects in
valid_obj', for the state relation to form a function from abstract to
concrete, we need to restrict the domains of the abstract asid pools.
Further we also need to ensure ASID 0 is not used in any of them, as
that is a sentinel value for "no ASID".

This is analogous to the restriction placed by valid_obj' on ASIDs on
X64, except occurring in the state relation rather than an invariant.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 0a397f626e riscv crefine: reduce sorries in ADT_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 5f1fd9aa64 riscv crefine: clear sorries from Refine_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 2eeaae4017 riscv crefine: fix fault_to_H for VMFault
Arguments were backwards for some reason.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 39be004a1a riscv crefine: sorry Refine_C
No examination of failing proofs this time. All CRefine files are now
present and accounted for.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 4bae495aa4 riscv crefine: sorried, very preliminary ADT_C
Broken bits blindly sorried or commented out with FIXME RISCV.
carch_state_to_H is currently wrong as valid_arch_state' is
insufficient to accurately describe global page tables.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 3775796809 riscv crefine: Init_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 1b92a83c01 riscv crefine: Syscall_C with a sorry needing spec update
On RISCV, we do not mask the interrupt on IRQSignal in handleInterrupt.
Spec currently masks this, so we provide the sorried intended spec
definition of handleInterrupt for the time being.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 6b3ae48b96 riscv crefine: Schedule_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 073db1c960 riscv crefine: Tcb_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski f9c1082a8b riscv crefine: Arch_C: update for C changes
Make a bit more progress after merging fixes for decode/invoke model
violation, and missing page table cap type check.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Rafal Kolanski 9b1291556e riscv crefine: sorry Arch_C
There are sorries waiting on C updates, a few large sorries, and several
chunks of commented-out X64 proofs that may need to be adapted to
address the other sorries.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein a29822c44e riscv crefine: proof update for potential InvalidPTE mapping
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein ae3358cc2f riscv crefine: prove lookupPTSlot_corres
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein 9d00b566d7 riscv crefine: adjust cpte_relation for new pte invariant
cpte_relation now encodes that PagePTEs can't have 000 rwx rights.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:10 +08:00
Gerwin Klein bdea44614d riscv crefine: clear Invoke_C sorries
Use the previous Haskell changes and asserts to clear the remaining
sorries in Invoke_C.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein 42c505c94a riscv crefine: adjust proofs to new api-object order
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski e650f39de3 riscv crefine: update for C setIRQTrigger changes
Update machine op assumption and remove Arch_invokeIRQControl_ccorres sorry.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 0ee70f00a5 riscv crefine: clear 3 sorries in Invoke_C
Resolved via C changes.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 461fca472d riscv crefine: sorried Invoke_C
Two big ones where crefine machinery leads us astray, and a few small
ones waiting on a spec update on api object enums.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein 917ccdf284 riscv crefine: reduce sorries in VSpace_C and Retype_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein 8871074809 riscv crefine: another long/demunged name in Machine_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 8659e32058 riscv crefine: Recycle_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 64d049f140 riscv crefine: update IsolatedThreadAction for new setVMRoot assertion
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 877aee385c riscv crefine: sorried Interrupt_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 2e16aae27f riscv crefine: Retype_C with sorried copyGlobalMappings
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 04b781a79a riscv crefine: sorried Delete_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski e9e562c33d riscv crefine: introduce registers_count type abbrev
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski adf175bc1b riscv crefine: update for C user exception message change
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein 6ca33d54e7 riscv crefine: reduce by one sorry in Finalise_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein a02357e09e riscv crefine: machine op parameter name changed
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein eeabaff06e riscv refine: reduce sorries in Finalise_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 5e886c171f riscv crefine: sorried Ipc_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 85e1fffe83 riscv crefine: IsolatedThreadAction
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 97f292cab9 riscv crefine: sorried Finalise_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski c38fed430f riscv crefine: IpcCancel_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 67eaeab106 riscv crefine: SyscallArgs_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 040e54c9e6 riscv crefine: StoreWord_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein 4e93309925 riscv crefine: reduce warnings in VSpace_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein d3e42da647 riscv crefine: clear 4 sorries in VSpace_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein f275c2c4c1 riscv crefine: clear sorries in Detype_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein 61abd075c2 riscv crefine: clear remaining CSpace_C sorry
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein fc4f83a128 riscv crefine: clear CSpace_C sorries up to kernel change
cap_get_capIsPhysical needs a C code change for its default case.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein cdd468fa77 riscv crefine: clear sorry in TcbQueue_C
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Gerwin Klein c5918e8479 riscv crefine: close sorry in PSpace
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski e4ce4f8945 riscv crefine: sorry VSpace_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 3a2bfe5a93 riscv crefine: sync frame PTE rights with C updates
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 7bec00882e riscv crefine: sorry Detype_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski df89db9550 riscv crefine: sorry TcbQueue_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 9c5b7fbff6 riscv crefine: sorry PSpace_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 0d582877a1 riscv crefine: StateRelation_C: adjust register_from_H
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski bc7b66e788 riscv crefine: TcbAcc_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 9a86c195ed riscv crefine: add valid_untyped' to ArchMove_C
Opted to use old form of statement and adjust proof, as CRefine proofs
are not aware of mask_range and a cleanup of that sort would take too
long at this time.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 533dd333ac riscv crefine: more ArchMove_C lemmas from X64
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski df2c0c30c1 riscv crefine: CSpace_All
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski dd0d36fbe1 riscv crefine: sorry CSpace_RAB_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski 11d988137b riscv crefine: sorried CSpace_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski d6706a5e03 riscv crefine: CSpaceAcc_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski d2f648ef10 riscv crefine: Machine_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski fdd5408c7e riscv crefine: SR_Lemmas_C
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski ac771e5958 riscv crefine: set up state relation
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-08 20:41:09 +08:00
Rafal Kolanski a2ea423e76 crefine: valid_untyped' lemma is not generic
Move it to ArchMove_C for each architecture except RISCV64. On RISCV64
the definitions of obj_range has changed to use mask_range and hence the
lemma statement would look different.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-04 23:29:52 +10:00
Rafal Kolanski 8f7b838b72 riscv crefine: update to Move_C/ArchMove_C includes
Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-04 23:29:52 +10:00
Gerwin Klein d8165c0c3e riscv crefine: spdx license headers
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-04 23:29:48 +10:00
Rafal Kolanski d7243fe80c riscv crefine: Move.thy -> Move_C.thy
Reflect change for other platforms.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-06-04 23:28:58 +10:00
Gerwin Klein 3f80b582ee riscv crefine: add AutoCorresTest stub (empty)
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-04 23:28:58 +10:00
Gerwin Klein 991790150d riscv crefine: skeleton + CtoCRefine
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-04 23:28:32 +10:00
Gerwin Klein d0dade06f4 riscv crefine: set up CBaseRefine
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-06-04 23:14:54 +10:00
Rafal Kolanski c4f6572aff arm+arm-hyp: move TPIDRURO from vcpu to tcb context
Update specs and proofs for ARM platforms to contain TPIDRURO in the
TCB user context rather than treating it as a VCPU register, following
change in C.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
2020-05-15 13:14:24 +10:00
Gerwin Klein 71e7f87614 haskell/refine/crefine: rename isBlocked to isStopped
sync with corresponding change in C

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
2020-05-06 15:49:02 +10:00
Victor Phan a7ed68e75d x64 crefine/lib: move word lemmas out of Move_C into Word_Lemmas_64_Internal
Signed-off-by: Victor Phan <Victor.Phan@data61.csiro.au>
2020-04-21 14:42:22 +10:00
Victor Phan 046a1358f6 crefine: remove lemmas moved into ArchMove_C/Move_C and fix proofs
Signed-off-by: Victor Phan <Victor.Phan@data61.csiro.au>
2020-03-20 13:42:48 +11:00
Victor Phan 70fe3fa943 crefine: arch split for Move theory files and move in lemmas
crefine/[ARCH]/Move.thy is replaced with crefine/Move_C.thy
(arch-generic), and crefine/[ARCH]/ArchMove_C.thy (arch-specific).
The only CRefine theory file that imports ArchMove_C is CLevityCatch,
and ArchMove_C imports Move_C which imports "Refine.Refine".

Lemmas found by looking through "FIXME: Move" comments have been added
to either Move_C or ArchMove_C depending on whether it is arch-generic
or arch-specific respectively.

Signed-off-by: Victor Phan <Victor.Phan@data61.csiro.au>
2020-03-20 13:42:43 +11:00
Gerwin Klein c68915b92b license: provide documentation under CC-BY-SA-4.0
Datat61 provides all docs under CC-BY-SA-4.0.
2020-03-16 14:19:15 +08:00
Gerwin Klein a424d55e3e licenses: convert license tags to SPDX 2020-03-13 14:38:24 +08:00
Gerwin Klein 8d12d8e4be licenses: tag .md and document file 2020-03-02 18:52:15 +08:00
Victor Phan 966734c69b Collect abstract lemmas in Refine
Create ArchMove_R.thy for transporting arch specific lemmas (and generic
lemmas that are used somewhat specifically by one architecture) to theory
files before Refine.

Create Move_R.thy as an arch generic Refine theory file for transporting
generic lemmas to theory files before Refine.

Also delete some lemmas that have existed earlier already or are not
needed.

Rename Move.thy in CRefine to Move_C.thy for consistency.
2020-02-21 11:49:25 +11:00
Rafal Kolanski f9ea44ef89 arm-hyp: update spec+proofs for multi-VM support
Highlights:
- new reserved IRQ and associated handler: VPPIEvent
- VPPI events are virtual interrupts we can forward to VMs; currently there is
  only one event: virtual timer interrupt
- VGICMaintenance and VPPIEvent can both receive late interrupts from hardware,
  which are now discarded instead of being delivered to current thread
- given only one possible VPPI event, simplifier tends to mop up more than it
  should, making some proofs fragile w.r.t. adding a new VPPI event
- the order of some lemmas/specs needed shuffling, as now VCPU code needs some
  interrupt code, which uses VCPU code
2020-02-19 10:52:07 +11:00
Zoltan Kocsis 788b4bd180 refactored irq_t structure (VER-1159) 2020-02-05 17:58:45 +11:00