Include the new ArchPSpace_H file, which on the other (non-AArch64)
architectures will only contain an empty placeholder function.
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
In Isabelle2020, when isabelle jedit is started without a session
context, e.g. `isabelle jedit -l ASpec`, theory imports with path
references cause the isabelle process to hang.
Since sessions now declare directories, Isabelle can find those files
without path reference and we therefore remove all such path references
from import statements. With this, `jedit` and `build` should work with
and without explicit session context as before.
Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
Highlights:
- new reserved IRQ and associated handler: VPPIEvent
- VPPI events are virtual interrupts we can forward to VMs; currently there is
only one event: virtual timer interrupt
- VGICMaintenance and VPPIEvent can both receive late interrupts from hardware,
which are now discarded instead of being delivered to current thread
- given only one possible VPPI event, simplifier tends to mop up more than it
should, making some proofs fragile w.r.t. adding a new VPPI event
- the order of some lemmas/specs needed shuffling, as now VCPU code needs some
interrupt code, which uses VCPU code
Session-qualified imports will be required for Isabelle2018 and help clarify
the structure of sessions in the build tree.
This commit mainly adds a new set of sessions for lib/, including a Lib
session that includes most theories in lib/ and a few separate sessions for
parts that have dependencies beyond CParser or are separate AFP sessions.
The group "lib" collects all lib/ sessions.
As a consequence, other theories should use lib/ theories by session name,
not by path, which in turns means spec and proof sessions should also refer
to each other by session name, not path, to avoid duplicate theory errors in
theory merges later.
As requested by verification, hypervisor registers are now an
enumeration-indexed array rather than individual fields. This cleans up
some of the proof. Additionally, we sweep some non-complexity under the
machine op rug: vcpu_hw_write/read_reg_ccorres is as deep as we go,
rather than specifying every operation and proving that
vcpu_hw_write seL4_VCPUReg_REG calls set_REG for every REG
I took this opportunity to clean up some arm-hyp definitions and proofs,
so some whitespace cleanup got tangled in.
pageBase is now generic in Haskell, but since PAddr, VPtr etc all map to word
in Isabelle, the generic type declaration would lead to an error.
Only necessary in ARM_HYP, but could be done in ARM as well if necessary.
* Renaming of some records to follow abstract/haskell convention
* Some duplicated constants were removed and placed in a shared
location (machine/ARM_HYP/MachineTypes.thy)
(copied from ARM)
Per-plaform CPP configuration for spec-check and make-spec.
The configuration is still duplicated between the two scripts, but now
the translation/check for ARM_HYP will use correct CPP settings.
Gerwin Klein
Rafal Kolanski
Rafal Kolanski
Gerwin Klein
Amirreza Zarrabi
Mitchell Buckley
Rafal Kolanski
Pang Luo
Matthew Brecknell
Joel Beeren
Miki Tanaka
Alejandro Gomez-Londono